SAN JOSE, Calif.
Dec 7, 2004
Xilinx, Inc. (NASDAQ: XLNX), the world's leading programmable logic provider, today announced the immediate availability of its educational e-learning module and white paper focused on design optimization for the Xilinx Virtex-4™ family.
The recorded module, available for immediate viewing at www.xilinx.com/virtex4, demonstrates how designers can optimize their Virtex-4 multi-platform FPGA designs to achieve breakthrough system level and logic performance at the lowest cost. Specific design examples are included to illustrate customer benefits. The following Virtex-4 performance advantages over competing FPGAs will be highlighted in today's module:
* Up to 43 percent higher logic performance * 2x higher memory bandwidth * 3x higher serial I/O bandwidth * 3x higher DSP performance * 3x higher embedded processing performance About Xilinx Virtex-4 Platform FPGAs
Enabled by the revolutionary ASMBL™ (Advanced Silicon Modular Block) architecture, Virtex-4 FPGAs deliver more options than any other FPGA family available today. Built with the most advanced triple-oxide 90 nm process technology and the widest range of embedded IP blocks, the Virtex-4 family reduces power consumption by 50 percent compared to previous generation FPGAs. With more than 100 technical innovations, the Virtex-4 family consists of 17 devices and three domain-optimized platforms: Virtex-4 LX FPGAs optimized for high-performance logic-intensive designs, Virtex-4 SX FPGAs optimized for high-performance signal processing, and Virtex-4 FX FPGAs optimized for high- speed serial connectivity and embedded processing. A multi-platform approach makes it possible for customers to select the optimal mix of resources for their application to achieve the highest functionality and breakthrough performance at the lowest cost.
All three platforms include a common set of breakthrough technology features, such as:
* 500 MHz Xesium™ clocking technology with differential signaling * Phased matched clock dividers (PMCD) * 500 MHz on-chip differential clock networks * 500 MHz SmartRAM technology with integrated FIFO control logic * 1 Gbps I/Os with integrated ChipSync source synchronous technology on every I/O * 500 MHz XtremeDSP Slices for 18x18 bit multiply and accumulate (MAC).
The LX platform provides all common features with up to 200,000 logic cells -- making it the world's highest logic density FPGA family. The SX platform incorporates the same basic set of features as LX devices, but includes more SmartRAM memory blocks and up to 512 XtremeDSP Slices -- far more than any other FPGA family on the market today. FX platform devices embed up to two 32-bit RISC PowerPC processors delivering in excess of 1300 Dhrystone MIPS along with up to four integrated 10/100/1000 Ethernet MAC cores for high-performance embedded processing applications. FX platform devices also include up to 24 RocketIO™ high-speed serial transceivers supporting the industry's widest performance range of 622 Mbps to 11.1 Gbps for industry-leading levels of high-speed serial performance. All key high-speed serial performance levels are supported including 10, 6.25, 4, 3.125, 2.5, 1.25, and 0.6 Gbps.
Register now at www.xilinx.com/virtex4 to receive Virtex-4 product updates via the Virtex E-Newsletter.Photo: NewsCom: http://www.newscom.com/cgi-bin/prnh/20020822/XLNXLOGO
SOURCE: Xilinx, Inc.
CONTACT: Xilinx Public Relations, +1-408-559-7778, or
Web site: http://www.xilinx.com/